UVM Verification Explained: From Pins to a Reusable Testbench
Master Universal Verification Methodology with animated component phases, virtual interfaces, TLM scoreboards, and a runnable Verilator UVM project.
Master Universal Verification Methodology with animated component phases, virtual interfaces, TLM scoreboards, and a runnable Verilator UVM project.
Simulate flip flop metastability, two stage synchronizers, pulse handshakes, Gray coded async FIFOs, and download synthesizable VHDL and SV files.
Step through every SPI SCLK edge across all four CPOL and CPHA modes, circular MOSI MISO shift registers, NOR Flash commands, and daisy chains.
Trace spin dependent tunneling across a seven layer MgO magnetic tunnel junction stack, synthetic antiferromagnet pinning, and Wheatstone readout.
Simulate complementary pMOS and nMOS inverters, NAND and NOR networks, latches, flip flops, static zero current, and dynamic switching power.
Inspect MOS inversion layers, threshold voltage, channel pinch off, triode and saturation equations, and body bias across nMOS and pMOS devices.
Explore carrier diffusion, exposed dopant space charge, built in potential barriers, depletion width modulation, and Shockley diode curves.
Discover how covalent silicon orbitals split into valence and conduction bands, how doping shifts the Fermi level, and how holes conduct charge.
Derive steady state current PDEs from minimum Joule heat dissipation and experiment live with Jacobi, Gauss Seidel, and SOR Poisson solvers.
Understand B, H, and M fields, bound surface currents, demagnetizing fields, and dipole flux falloff around a 3 mm NdFeB N45 permanent magnet cube.
Visualize divergence, curl, Gauss law, Faraday induction, and Ampere Maxwell displacement current with eleven interactive electromagnetism canvases.
Build deep intuition for voltage, electric field line integrals, electron drift velocity, Kirchhoff loops, and Ohm’s law across ten interactive demos.